man(1) Manual page archive


     XILINX(10.1)                                         XILINX(10.1)

     NAME
          xil, xnfpins, xnffrom, xnfto - xilinx tools

     SYNOPSIS
          cda/xil [ -x ] name.m > new.xnf
          cda/xnfpins name part [ pin... ] > new.pins
          cda/xnffrom part old.pins new.xnf > new.pins
          cda/xnfto part name.pins name.xnf > name.cst

     DESCRIPTION
          Xil factors and translates input in minterm(10.6) format to
          Xilinx Netlist Format suitable for processing by the propri-
          etary Xilinx program ppr (partition, place & route) and sub-
          sequent programs.

          Xilinx hard macros and RAM/ROM symbols generated by the Xil-
          inx memgen program can be used via the lde(10.1) .m facil-
          ity.

          Xnfpins, xnfto, and xnffrom create and maintain CDA pins and
          Xilinx constraint files.  Xnfpins produces an initial .pins
          file given the Xilinx part number (e.g.  4005pg156) and a
          list of statically assigned pin names, typically those used
          for initializing the part.  Subsequent programs retain this
          initial information in the face of changes in automatically
          assigned pins.

          Xnffrom takes EXT lines in an .xnf file produced by
          lca2xnf(10.1) as back annotation to update the corresponding
          CDA .pins file and subsequently constrain ppr's choice of
          pins.

          Xnfto takes .tp lines following #float in the .pins file
          that appear in the .xnf file and fixes them in the .cst
          (constraints) file used by ppr. Xnfto should be used only to
          maintain pinouts generated by ppr and xnffrom and only after
          said pinouts have been set in physical design concrete.

          The files used and generated by these programs have to be
          shipped back and forth between Plan 9 and a suitably
          licensed Xilinx platform.  Use mk(1) to control this.

     FILES
          /sys/lib/cda/40nn.pin

     SEE ALSO
          lde(10.1)
          ppr(Xilinx)
          memgen(Xilinx)
          lca2xnf(Xilinx)

     XILINX(10.1)                                         XILINX(10.1)

     BUGS
          It may be complicated, but Actel is worse.
          Ppr gets very confused if it sees a constraint against using
          a pin it wasn't going to use anyway.