man(1) Manual page archive


     CDMGLOB(10.1)                                       CDMGLOB(10.1)

     NAME
          cdmglob, cdmglob.errors - expand circuit macros

     SYNOPSIS
          cda/cdmglob [ -L ] [ -f ] [ -k ] [ -v ] [ files ]

          cdmglob.errors error_file_from_cdmglob

     DESCRIPTION
          Cdmglob reads a circuit described in CDL from the specified
          files.  Macro calls are expanded and pin numbers are substi-
          tuted for pin names.  The expanded CDL is printed on the
          standard output.  The error output is used for diagnostics.
          Note that names in CDL are restricted in length so that care
          should be taken to keep macro names short.  The options
          available are:
          -L   generates LSL instead of CDL.
          -    means standard input.
          The -f option causes macro calls to be recursively expanded
          in-line.  The -k option causes shape instances to be renamed
          to the name of the first actual output argument.  The -v
          option causes the name of the pin to be output on the line.
          This is needed for annotate(10.1).

        Macro Definitions
          A macro definition corresponds to a file containing CDL.
          The name of the file for a definition d is d.w.  Such CDL
          files may be produced using gnet(10.1). Macros may have sig-
          nal names as parameters.  These parameters are identified by
          a pin name.  The (set of) formal signal names associated
          with the macro pin is replaced when the macro is called with
          actual signal names, unless the formal signal name is glo-
          bal.  In this latter case the actual and formal signal names
          must be the same.

        Macro calls
          A chip of type d is a macro call if the file d.w exists.  If
          no such file exists, the chip is assumed to be primitive (as
          in, say, 74S181), and if the type is surrounded by <> brack-
          ets, the chip is an input output connector.  If d.w exists
          then it is the definition of the macro d. Signal parameters
          of the macro are drawn in the same way as signals are con-
          nected to a chip.  The pin name is the macro parameter name
          and the signal is the actual signal parameter.  The name of
          the chip is interpreted as a macro name.  A given macro can
          be called more than once, different instances being gener-
          ated by different macro call names.  Macros may not be
          called recursively.

        Names

     CDMGLOB(10.1)                                       CDMGLOB(10.1)

          Signal, chip and pin names consist of letters, digits and
          the characters +-/$.  Names of individual signals in a bun-
          dle or of chips in a group may also be generated: name[ac-f]
          generates namea namec named namee namef; name{a,c,d,e,f}
          will do the same thing but can be longer than one character.
          name<i:j> generates namei ...  namej where i and j are rep-
          resented in decimal as strings, all the same length.  Thus,
          BUS01 (and not BUS1) is in the set BUS<0:15>.

          The set of generated names can be separated by an amount k
          by writing name<i:k:k> and multiple indexing is allowed:
          name<i:j><p:q>.  Mixing the two generation methods is
          allowed.

          Signal and chip names have scope local to a macro definition
          unless the name contains a /.  A name containing a / is
          available throughout a circuit.  Connector names are also
          available throughout a circuit.  Signal and chip names used
          as formal parameters in a macro definition are replaced dur-
          ing macro expansion with the sequence of macro call names
          separated by / and ending with the actual parameter signal
          name.

        Name Matching
          The names of pins, signals and chips may also be generated
          from patterns.  A pin pattern searches all pin names for the
          chip type.  Signal and chip patterns search all signal or
          chip names.  Patterns have the following form.
               *    matches any sequence of characters
               [...]     matches any of the characters enclosed
               [x-y]     matches any character in the (ASCII) range x to y
               ?    matches a single character

        Signal Expansion
          A signal bundle may be connected to one or more chips (or
          macro) without having to write each chip or signal explic-
          itly.  In general each such array is expanded by generating
          the specified set of names.  These names are then sorted
          alphabetically.  The first signal is connected to the first
          pin of the first chip.  Subsequent signals are connected to
          successive pins.  If no more pins exists then the first pin
          on the next chip is used.  The signal bundle must always end
          on the last pin of a chip and there must be no signals unat-
          tached at the end.

          Cdmglob.errors takes the error output from cdmglob(10.1) and
          finds the real error by looking into the offending .w files
          and prints the error on standard output.

     SEE ALSO
          annotate(10.1), cdl(10.6)